RTL8309SB

Product Summary

The RTL8309SB is a 128-pin, ultra low power, high-performance 8-port Fast Ethernet single-chip switch ; with one extra MII port for specific applications. It integrates all the functi ons of a high speed switch ; system 鈥攊ncluding SRAM for packet buffering, non-bloc king switch fabric, address management, one ; general use MII interface, eight 10/100Base-TX transceivers, and nine Media Access Controllers鈥攊nto a ; single 0.18渭m CMOS device. It provides compatibility with all indust ry standard Ethernet and Fast ; Ethernet devices. Only a 25MHz crystal is required; the EEPROM is optional to save BOM costs. ; The embedded packet storage SRAM in the R TL8309SB features superior memory management ; technology to efficiently utilize the memory space. An integrated 1024-entry look-up table stores MAC ; address and associated information in a 10-bit di rect mapping scheme. The table provides read/write ; access from the SMI interface, and each of the entries can be configured as a static entry. A static entry ; indicates that this entry is controlled by the exte rnal management processor and automatic aging and ; learning of the entry will not take place. To prevent MAC address mapping collisions, the embedded 16-entry Content-Addressable Memory (CAM) offers another memory space for recording the MAC address ; when the mapped entry in the lookup table is occupied. For each incoming packet, the RTL8309SB ; searches the entries in the lookup ta ble and the 16-entry CAM simultane ously. Then it obtains the correct ; destination port information to determine which output port the packet should be forwarded to. The aging ; time of the RTL8309SB is around 300 seconds (t his may be sped up to 800渭s via EEPROM ; configuration

Features

(1)Integrates eight 10/100 transceivers and nine ; (2)MAC units for 10Base-T and 100Base-TX. ; (3)Embedded SRAM for packet storage. ; (4)On-chip 1024-entry look -up table in direct ; (5)mapping mode. ; (6)Embedded 16-entry CAM for hash collision ; (7)mapping. ; (8)Provides read/write access to look-up table ; (9)entries via SMI interface. ; (10)Provides non-blocking wire speed reception ; (11)and transmission. ; (12)Flow control fully supported: ; (13) Half-duplex: backpressure flow control. ; (14) Full-duplex: IEEE 802.3x flow control. ; (15)Support for 4 LEDs per-port in various ; (16)combinations for comprehensive ; (17)applications. ; (18)Optional loop detection function with an ; (19)LED to indicate the existence of a loop. ; (20)Supports MII loopback. ; (21)LEDs blink upon reset for LED diagnostics. ; (22)Flexible system configuration by strapping ; (23)pins, EEPROM, or SMI interface. ; (24)Optional crossover detection and auto ; (25)correction for plug-and-play. ; (26)Fully compliant with IEEE 802.3/802.3u. ; (27)Optional Forwarding/Filtering reserved ; (28)control frames (DID= ; (29)0180C2000003~0180C200000F).